Summary
Overview
Work History
Education
Skills
Timeline
Generic

Valmor Cordeiro

Verification Engineer
Tokyo

Summary

A seasoned Principal Verification Engineer with a proven track record at Renesas Electronics, I excel in leading multi-site teams through complex digital and mixed-signal verification projects. Skilled in UVM methodology and teamwork, my work has propelled next-gen technologies for industry giants, showcasing a blend of technical prowess and collaborative success.

Overview

11
11
years of professional experience
5
5
years of post-secondary education
4
4
Languages

Work History

Principal Verification Engineer

Renesas Electronics
03.2023 - Current

Led a digital and mixed-signal multi-site verification teams for custom PMIC (Power Management Integrated Circuit) projects targeting new console generation for companies like Nintendo and SIE (Sony Interactive Entertainment) PlayStation.

Lead Verification Engineer

Rambus
01.2022 - 02.2023

Led a multi-site digital verification team for custom cryptography IPs like Root of Thrust for companies like Google, Meta, and Spacex.

Senior Verification Engineer

DreamChip Technologies
10.2020 - 12.2021

Collaborated with cross-functional verification teams to verify ISPs (Image Signal Processor) for companies like BWM, Audi, and Xiaomi.

Senior Verification Engineer

GrAI Matter Labs
12.2019 - 09.2020

Collaborated with a local verification team to verify a new generation of AI Neural Processors used for agencies such as DARPA and USAF.

Verification Engineer

Unitec Semiconductors
06.2016 - 11.2019

Collaborated with a local verification team to verify ICs for IOT (Internet of Things) applications.

Verification Engineer

Eldorado Research Institute
08.2014 - 04.2016

Collaborated with a local verification team to verify ICs for medical applications such as pacemakers.

Education

Professional Master - Integrated Circuit Design

Federal University of Rio Grande Do Sul
Porto Alegre, Brazil
08.2013 - 07.2014

Bachelor - Computer Science

Passo Fundo University
Passo Fundo, Brazil
02.2009 - 07.2013

Skills

    UVM methodology

    Verification planning

    Formal verification techniques

    Analog mixed-signal verification

    SystemVerilog expertise

    SoC verification

    Teamwork and collaboration

    IP Verification

Timeline

Principal Verification Engineer

Renesas Electronics
03.2023 - Current

Lead Verification Engineer

Rambus
01.2022 - 02.2023

Senior Verification Engineer

DreamChip Technologies
10.2020 - 12.2021

Senior Verification Engineer

GrAI Matter Labs
12.2019 - 09.2020

Verification Engineer

Unitec Semiconductors
06.2016 - 11.2019

Verification Engineer

Eldorado Research Institute
08.2014 - 04.2016

Professional Master - Integrated Circuit Design

Federal University of Rio Grande Do Sul
08.2013 - 07.2014

Bachelor - Computer Science

Passo Fundo University
02.2009 - 07.2013
Valmor CordeiroVerification Engineer